PowerLattice, a company redefining power delivery for next-generation AI accelerators, announced its emergence from stealth with $25 million in funding led by Playground Global and Celesta Capital, bringing total capital raised to $31 million. The company introduced a breakthrough power delivery chiplet designed to couple power and compute, cutting total compute power requirements by more than 50% and enabling significantly higher performance.
“Power is the defining challenge for AI’s future,” said Peng Zou, Co-Founder, CEO and President of PowerLattice. “Data centers are already starting to hit a power wall and the problem is only going to get worse if we don’t rethink how chips are powered. By bringing power directly into the processor package, we’re delivering the performance and efficiency AI needs to keep scaling beyond today’s limits.”
“AI is not constrained by capital, it’s constrained by power,” said Pat Gelsinger, General Partner, Playground Global. “PowerLattice represents a dramatic breakthrough in the efficiency and scale of power delivery. This is the kind of generational leap Playground backs: technology that doesn’t just advance chips, but reshapes the entire trajectory of computing.”
“PowerLattice is delivering a truly scalable solution to attack the cost-performance, reliability and cooling bottlenecks throttling AI data centers,” said Dr. Steve Fu, Partner, Celesta Capital. “I know exactly how tough this problem is, having previously led power device and system incubation at global semiconductor leaders and watching two decades of attempts fall short of the real potential. It is why we zeroed in on this opportunity in our thesis at Celesta – and why we believe PowerLattice’s solution is the unlock the industry has been waiting for.”
PowerLattice targets the escalating power limitations of modern AI infrastructure. AI accelerators and GPUs now exceed 2 KW per chip, pushing data centers toward unsustainable power demand. Conventional power delivery architectures force high current through long, resistive paths, limiting performance and wasting significant energy.
PowerLattice’s chiplet brings power directly into the processor package, supported by proprietary miniaturized magnetic inductors, advanced voltage control circuitry, a vertical architecture, and a programmable software layer. This approach shortens the power path, increases compute utilization, and reduces energy loss, enabling stronger reliability for large-scale AI clusters.
Engineering samples for 1 KW+ GPUs, CPUs and accelerators are underway, following successful silicon development. The technology is designed for seamless integration into existing system-on-chip architectures.
PowerLattice was founded by Peng Zou, Gang Ren and Sujith Dermal, combining decades of experience in integrated magnetics, analog ICs, power management, and semiconductor systems. Board members include Pat Gelsinger of Playground Global and Dr. Steve Fu of Celesta Capital, reflecting strong strategic alignment with leading industry stakeholders.